1. Field of the Invention
The present invention relates to a semiconductor device including a circuit constituted by a thin film transistor on a substrate having an insulating surface and a method of fabricating the same. For example, the invention relates to a structure of an electro-optical device typified by a liquid crystal display device, and an electronic equipment incorporating the electro-optical device. Incidentally, in the present specification, the term “semiconductor device” indicates any devices functioning by using semiconductor characteristics, and includes the foregoing electro-optical device and the electronic equipment incorporating the electro-optical device in its category.
2. Description of the Related Art
Attention has been paid to a technical development for fabricating an active matrix type liquid crystal display device by forming a thin film transistor (hereinafter referred to as a “TFT”) on a transparent glass substrate. Particularly, since high mobility can be obtained for a TFT (crystalline TFT) including an active layer of a semiconductor film having crystal structure, it has become possible to realize image display with high fineness by integrating functional circuits on the same substrate.
In the present specification, the semiconductor film having crystal structure includes a single crystal semiconductor, a polycrystal semiconductor, and a microcrystal semiconductor, and further, includes a semiconductor disclosed in Japanese Patent Application Laid-open Nos. Hei. 7-130652, Hei. 8-78329, Hei. 10-135468, or Hei. 10-135469.
In order to construct an active matrix type liquid crystal display device, one million to two million crystalline TFTs are required for only a pixel matrix circuit (hereinafter referred to as a “pixel portion”), and further, when functional circuits provided at the periphery are added, more crystalline TFTs have been required. The specification required for the liquid crystal display device is severe, and in order to stably perform image display, it has been necessary to secure reliability of each crystalline TFT.
The characteristics of a TFT can be considered by dividing them into two states of an on state and an off state. The characteristics such as an on current, mobility, S-value, and threshold value can be known from the characteristics of the on state. In the characteristics of the off state, importance is attached to an off current.
The pixel portion of the active matrix type liquid crystal display device is constructed by arranging n-channel TFTs two-dimensionally, and is driven by application of a voltage having an amplitude of about 15 to 20 V. Here, it is natural that the characteristics of the on state are satisfied, and further, it has been necessary that the off current is sufficiently lowered.
On the other hand, a driver circuit provided at the periphery of the pixel portion is constructed using a CMOS circuit as a base, and is made up of a shift register, a level shifter, a buffer circuit, and a sampling circuit. In these circuits, importance has been attached mainly to the characteristics of the on state.
However, the crystalline TFT has a problem that the off current is apt to become high.
Besides, the crystalline TFT has been regarded as being inferior to a MOS transistor (transistor fabricated on a single crystal semiconductor substrate) used for an LSI or the like in reliability. For example, when the crystalline TFT is continuously driven, a deterioration phenomenon, such as a decrease in mobility or on current (current flowing when a TFT is in an on state), or an increase in off current (current flowing when a TFT is in an off state), has been sometimes observed. It has been considered that this cause is a hot carrier effect, and hot carriers generated by a high electric field in the vicinity of a drain cause the deterioration phenomenon.
In the MOS transistor, as a method of decreasing the off current and relieving the high electric field in the vicinity of the drain, a low concentration drain (LDD: Lightly Doped Drain) structure has been known. In this structure, an impurity region having a low concentration is provided outside of a channel region, and this low concentration impurity region is called an LDD region.
Naturally, it has been known that the LDD structure is formed also in the crystalline TFT. For example, Japanese Patent Application Laid-open No. Hei. 7-202210 discloses such a technique that a gate electrode is made a two-layer structure having two layers of different widths, the width of an upper layer is formed to be smaller than the width of a lower layer, and ion implantation is performed using the gate electrode as a mask, so that an LDD region is formed by one step of ion implantation using a difference in intrusion depth of ions which is caused from a difference in thicknesses of the two layers of the gate electrode. The TFT has such a structure that the gate electrode exists just over the LDD region, that is, a gate overlap structure.
The gate overlap structure is known as GOLD (Gate-drain Overlapped LDD) structure, LATID (Large-tilt-angle implanted drain) structure, ITLDD (Inverse TLDD) structure, or the like. By this, the high electric field in the vicinity of the drain is relieved to prevent the hot carrier effect, and reliability can be improved. For example, in “Mutsuko Hatano, Hajime Akimoto and Takeshi Sakai, IDEM 97 TECHNICAL DIGEST, p 523–526, 1977”, it is ascertained that extremely excellent reliability can be obtained in the GOLD structure with a side wall formed of silicon as compared with TFTs of other structures.
However, the structure disclosed in the paper has a problem that the off current becomes high as compared with a normal LDD structure, and a countermeasure therefor has been necessary. Particularly, in an n-channel TFT constituting a pixel matrix circuit (hereinafter referred to as a “pixel TFT”), if the off current is increased, consumed electric power is increased and an abnormality appears on image display. Thus, it has not been possible to apply a crystalline TFT of the GOLD structure as it is.